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IRF9530, RF1S9530SM
Data Sheet July 1999 File Number
2221.4
12A, 100V, 0.300 Ohm, P-Channel Power MOSFETs
These are P-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. The high input impedance allows these types to be operated directly from integrated circuits. Formerly developmental type TA17511.
Features
* 12A, 100V * rDS(ON) = 0.300 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334, "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering Information
PART NUMBER IRF9530 RF1S9530SM PACKAGE TO-220AB TO-263AB BRAND IRF9530 RF1S9530
Symbol
D
G
NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S9530SM9A.
S
Packaging
JEDEC TO-220AB
SOURCE DRAIN GATE DRAIN (FLANGE) GATE SOURCE
JEDEC TO-263A
DRAIN (FLANGE)
4-9
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRF9530, RF1S9530SM
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRF9530, RF1S9530SM -100 -100 -12 -7.5 -48 20 75 0.6 500 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to TJ = 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(off) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured From the Modified MOSFET Contact Screw On Tab To Symbol Showing the Center of Die Internal Devices Measured From the Drain Inductances Lead, 6mm (0.25in) From Package to Center of Die
D LD
TEST CONDITIONS ID = -250A, VGS = 0V, (Figure 10) VGS = VDS, ID = -250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TC= 125oC VDS > ID(ON) x rDS(ON)MAX, VGS = -10V, (Figure 7) VGS = 20V ID = -6.5A, VGS = -10V, (Figures 8, 9) VDS > ID(ON) x rDS(ON) Max, ID = -6.5A (Figure 12) VDD = 50V, ID -12A, RG = 50, VGS = 10V RL = 4.2, (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = -10V, ID = -12A, VDSS= 0.8 x Rated BVDSS, (Figure 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11)
MIN -100 -2 -12 2 -
TYP 0.250 3.8 30 70 70 70 25 13 12 500 300 100 3.5
MAX -4 -25 -250 100 0.300 60 140 140 140 45 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain ("Miller") Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
-
4.5
-
nH
Internal Source Inductance
LS
Measured From The Source Lead, 6mm (0.25in) From Header to Source Bonding Pad
G LS S
7.5
-
nH
Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
RJC RJA Typical Socket Mount
-
-
1.67 62.5
oC/W oC/W
4-10
IRF9530, RF1S9530SM
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 2) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
G D
MIN -
TYP -
MAX -12 -48
UNITS A A
S
Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:
VSD trr QRR
TJ = 25oC, ISD = -12A, VGS = 0V, (Figure 13) TJ = 150oC, ISD = -12A, dISD/dt = 100A/s TJ = 150oC, ISD = -12A, dISD/dt = 100A/s
-
300 1.8
-1.5 -
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 5.2mH, RG = 25, peak IAS = 12A. See Figures 15, 16.
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8
Unless Otherwise Specified
-12.0
ID, DRAIN CURRENT (A)
-9.6
-7.2
0.6 0.4
-4.8
-2.4
0.2 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 0 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
1 THERMAL IMPEDANCE ZJC, NORMALIZED 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE PDM t1 t2 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + RJA +TC 0.01 10-5 10-4 10-3 10-2 10-1 t 1, RECTANGULAR PULSE DURATION (s) 1 10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
4-11
IRF9530, RF1S9530SM Typical Performance Curves
-100
Unless Otherwise Specified (Continued)
-20 VGS = -9V VGS = -10V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = -8V
ID, DRAIN CURRENT (A)
-10
100s 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) TC = 25oC TJ = MAX RATED SINGLE PULSE
ID, DRAIN CURRENT (A)
10s
-16
-12
VGS = -7V -8 VGS = -6V
-1
10ms 100ms DC
-4
VGS = -5V VGS = -4V
-0.1 -1
-10 -100 VDS, DRAIN TO SOURCE VOLTAGE (V)
-1000
0
-10
-20
-30
-40
-50
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
-10 VGS = -8V VGS = -9V VGS = -10V -6 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = -5V -2 VGS = -4V 0 0 -2 -4 -6 -8 -10 VGS = -6V VGS = -7V ID(ON), ON-STATE DRAIN CURRENT (A)
-20
VDS I D(ON) x rDS(ON) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX -55oC 25oC 125oC
ID, DRAIN CURRENT (A)
-8
-16
-12
-4
-8
-4
0 0 -2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V) -10
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 6. SATURATION CHARACTERISTICS
1.0
FIGURE 7. TRANSFER CHARACTERISTICS
2s PULSE TEST VGS = -10V NORMALIZED DRAIN TO SOURCE ON RESISTANCE
2.2
rDS(ON) DRAIN TO SOURCE
0.8 ON RESISTANCE ()
1.8
VGS = -10V, ID = -6.5A PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
0.6
1.4
0.4 VGS = - 20V 0.2
1.0
0.6
0 0 -10 -30 -20 ID, DRAIN CURRENT (A) -40 -50
0.2
-40
0
40
80
120
NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
4-12
IRF9530, RF1S9530SM Typical Performance Curves
1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 1.15 800 C, CAPACITANCE (pF)
Unless Otherwise Specified (Continued)
1000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD CISS COSS
1.05
600
0.95
400
0.85
200
CRSS
0.75 -40
0
40
80
120
160
0
0
-10
-20
-30
-40
-50
TJ , JUNCTION TEMPERATURE (oC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
5
TJ = -55oC
-100 TJ = 25oC ISD, DRAIN CURRENT (A) TJ = 125oC
gfs, TRANSCONDUCTANCE (S)
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TJ = 150oC
4
-10
3
2
-1.0
TJ = 25oC
1 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 0 0 -4 -8 -12 -16 -20 ID , DRAIN CURRENT (A)
-0.1 -0.4 -0.6 -0.8 -1.4 -1.0 -1.2 -1.6 VSD, SOURCE TO DRAIN VOLTAGE (V) -1.8
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0
I D = -12A
VGS, GATE TO SOURCE (V)
-5
- 10 VDS = -20V VDS = -50V VDS = -80V
- 15 0 8 16 24 42 Qg(TOT) , TOTAL GATE CHARGE (nC) 40
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-13
IRF9530, RF1S9530SM Test Circuits and Waveforms
VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0
+
VDD VDD
0V VGS
DUT tP IAS 0.01
IAS tP BVDSS VDS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr 0 RL 10%
tOFF td(OFF) tf 10%
DUT VGS RG
VDD
+
VDS VGS 0
90%
90%
10% 50% PULSE WIDTH 90% 50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
-VDS (ISOLATED SUPPLY)
0 VDS
DUT 12V BATTERY 0.2F 50k 0.3F Qgs D G 0 IG(REF) IG CURRENT SAMPLING RESISTOR S +VDS ID CURRENT SAMPLING RESISTOR 0 DUT VDD Qgd
VGS
Qg(TOT)
IG(REF)
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
4-14
IRF9530, RF1S9530SM
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4-15

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